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PCI Express (PCIe) Architecture Foundation

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Video Title Minutes
01: PCI Evolution and Architectural Overview 28
02: PCI Evolution 51
03: Architectural Components 32
04: Serial Communications and Protocol Stacks 55
05: Transaction Layer and Packet Definition 60
06: Virtual Channel, Flow Control and Data Integrity 20
07: Data Link Layer and Physical Layer 36
08: Power Management and Data Integrity 41
09: Details of the Physical Layer - Logic Sub Block 26
10: Isochronous Workshop 14
11: Electrical Sub-block and PCIe Power Management 29
12: PCI/PCI-X Configuration Space 22
13: Configuration Methods 9
14: Bus Enumeration Workshop Answer and Explanation 7
15: Register Set 17
16: Interrupt Support and Power Management 25
17: System Additional Features 52
18: Virtual Channels 28
19: The Future & Course Evaluation 23
Total: 9 hours 35 minutes

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Description

This PCI Express (PCIe) Architecture online training course covers the PCI-SIG's PCI Express Base Specification, including version 2.0 changes/enhancements. Emphasized material will include the details of the new PCI Express protocol stack for Express devices, including protocol layer functions and formats, transaction details, and configuration requirements.

PCI Express is a next generation PCI enhancement, and is here to stay. Express is now a serial bus inter-connect I/O technology, along with associated speed, protocol, and capabilities enhancements well beyond PCI and PCI-X. Express is an extension of the PCI Base Specification and maintains binary backwards compatibility with previous versions of the PCI and PCI-X Specification.

Objectives

As a result of taking this PCIe online training, you will be able to:

  • Explain PCI Express fabric topology, the terms and definitions
  • Identify the PCI Express protocol including layer definitions and layer relationships
  • List the Traffic types defined by PCI Express and the meaning and usage of isochronous traffic
  • Define the PCI Express configuration
  • Identify compatibility requirements with PCI and PCI-X, and PCI Express new enhanced features
  • Discuss the parallel/serial paradigm shift and PCI Express capabilities relative to other serial hardware/software architects
  • Use the serial protocol analyzer in design and debug, validation, and testing

Related Training

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Start Learning PCI Express (PCIe) Architecture Foundation Today!

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PCI Express (PCIe) Architecture Foundation Outline

Module 01: PCI Evolution and Architectural Overview

  • PC I/O History
  • PCI Specification History
  • PCI I/O Bandwidth Evolution
  • PCIe Compatibility and New Features
  • PCIe hardware interconnect

Module 02: PCI Evolution

  • Architectural Components
  • Compatibility with Existing PCI Specification
  • Legacy PCI Operation
  • Low Latency and High Bandwidth
  • New Features
  • Scalable Topologies

Module 03: Architectural Components

  • PCI and PCI-X Commands
  • PCIe Transactions and Packets
  • PCI Devices
  • PCI/PCI-X/PCIe Bridges
  • PCI/PCI-X Arbitration
  • Delivering Interrupts
  • PCIe Links
  • PCI Configuration Address Space

Module 04: Serial Communications and Protocol Stacks

  • Serial vs. Parallel Communications
  • Layered Protocol Stacks
  • Serial Switches
  • Serial Protocol Analyzers
  • How much do you want to pay to get there
  • Chapter Summary

Module 05: Transaction Layer and Packet Definition

  • The Transaction Layer functions and services defined by PCIe
  • The characteristics, construction, and processing of the PCIe Transaction Layer including
  • Packet and header construction
  • Addressing, transaction type and transaction usage
  • Transaction Layer rules and ordering

Module 06: Virtual Channel, Flow Control and Data Integrity

  • Virtual Channel concepts and usage relating to PCIe
  • Flow Control
  • Data integrity and link state dependencies

Module 07: Data Link Layer and Physical Layer

  • Data Link Layer and Physical Layer
  • Data Link Layer Packets
  • Initialization
  • Packet Construction and Rules

Module 08: Power Management and Data Integrity

  • Power Management
  • Data Integrity
  • Chapter Summary

Module 09: Details of the Physical Layer - Logic Sub Block

  • The characteristics, services, and operation of the Physical Layer
  • Logical Sub-block

Module 10: Isochronous Workshop

Module 11: Electrical Sub-block and PCIe Power Management

  • Electrical Sub-Block Overview of Mechanical
  • PCIe Power Management (PCIe PM) capabilities and protocols

Module 12: PCI/PCI-X Configuration Space

  • PCI/PCI-X Configuration Space compatibility and PCIe extensions

Module 13: Configuration Methods

  • Configuration methods used in discovering and configuring Express devices
  • Bus Enumeration Workshop

Module 14: Bus Enumeration Workshop Answer and Explanation

Module 15: Register Set

  • The definition and format of the PCIe required register set

Module 16: Interrupt Support and Power Management

  • Overview
  • Interrupt Support
  • Power Management

Module 17: System Additional Features

  • Error Signaling and Logging
  • VC and Isochronous Support
  • Lock
  • Reset and Hot-Plug
  • Chapter Summary

Module 18: Virtual Channels

  • Causes of congestion in a switched environment
  • PCIe virtual channels and how they can be used

Module 19: The Future and Course Evaluation

  • Speed Enhancements
  • Virtualization Capabilities
  • ATS
  • SR IOV
  • MR IOV

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Prerequisites

Participants should have a good working understanding of PCI 2.2 or later. Knowledge of the related PCI supporting specifications as defined by the PCI Special Interest Group (PCI SIG) is helpful but not required.

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Start Learning PCI Express (PCIe) Architecture Foundation Today!

List Price: $995 Your Price: $295 Buy PCI Express (PCIe)  Architecture Foundation Now

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